FIGS. 3(a) to 3(g) illustrate a prior art method of producing a heterojunction bipolar transistor (HBT). In FIG. 3(a), an n -type GaAs sub-collector layer 2 having a thickness of about 5,000 Angstroms and an impurity concentration of 5.times.10.sup.18 cm.sup.-3 is disposed on a semi-insulating GaAs substrate 1. An n-type GaAs collector layer 3 having a thickness of about 5,000 Angstroms and an impurity concentration of about 5.times.10.sup.16 cm.sup.-3 is disposed on the n.sup.+ -type GaAs layer 2. A p.sup.+ -type GaAs base layer 4 having a thickness of about 1,000 Angstroms and an impurity concentration of about 1.times.10.sup.19 cm.sup.-3 is disposed on the n-type GaAs layer 3. A grading layer 5a is disposed between the p-type GaAs layer 4 and an emitter layer 5 and comprises n-type Al.sub.x Ga.sub.1-x As, where x gradually varies from 0 to 0.3 in the direction of the emitter layer 5. The grading layer 5a has a thickness of about 500 Angstroms and an impurity concentration of about 3.times.10.sup.17 cm.sup.-3. An n-type Al.sub.0.3 Ga.sub.0.7 As emitter layer 5 having a thickness of about 1,000 Angstroms and an impurity concentration of about 3.times.10.sup.17 cm.sup.-3 is disposed on the grading layer 5a. A second grading layer 5b is disposed between the emitter layer 5 and an emitter cap layer 6. The grading layer 5b comprises n-type Al.sub.x Ga.sub.1-x As, where x gradually varies from 0.3 to 0 in the direction of the emitter cap layer 6, having a thickness of about 500 Angstroms and an impurity concentration of about 3.times.10.sup.17 cm.sup.-3. The emitter cap layer 6, comprising n.sup.+ -type GaAs, has a thickness of about 2,000 Angstroms, an impurity concentration of about 5.times.10.sup.18 cm.sup.-3, and is disposed on the grading layer 5b.
In FIG. 3(b), an emitter electrode dummy pattern 7 formed of a first insulating film, such as SiON or SiN, has a thickness of about 5,000 Angstroms. A p-type external base region 8 is produced by ion implantation of Mg.sup.+ ions to a depth of about 3,000 Angstroms and an impurity concentration of about 5.times.10.sup.18 cm.sup.-3.
In FIG. 3(c), a second insulating film 9 comprises SiO and has a thickness of about 3,000 Angstroms. An insulating region 10 produced by ion implantation of B.sup.+ ions or H.sup.+ ions has a depth of about 11,000 Angstroms.
In FIG. 3(d)), a side wall 11 is produced by reactive ion etching (RIE) of the second insulating film 9.
The structure of FIGS. 3(e) and 3(f) includes a base electrode resist pattern 12 and base electrode metal, such as AuZn, 13 and 13a.
In FIG. 3(g), a first or second insulating film 14 is flattened using photoresist and uniform speed etching of the photoresist and the insulating film by RIE. An emitter electrode 15, such as an AuGe alloy, is also shown in FIG. 3(g).
The structure shown in FIG. 3(a) is produced by molecular beam epitaxy (MBE) or metal organic chemical vapor deposition (MOCVD).
As shown in FIG. 3(b), a first insulating film comprising SiON or SiN is deposited on the entire surface of the structure shown in FIG. 3(a), and the insulating film is patterned by photolithography to produce a dummy pattern 7 for the emitter electrode. Then, the n.sup.+ -type GaAs emitter cap layer 6 is wet etched with a solution of sulfuric acid, hydrogen peroxide, and water using the dummy pattern 7 as a mask. Next, Mg.sup.+ ions are ion implanted using the dummy pattern 7 as a mask, and an external base region 8 having a depth of about 3,000 Angstroms and an impurity concentration of about 5.times.10.sup.18 cm.sup.-3 is produced.
In FIG. 3(c), the second insulating film 9 comprising SiO is deposited on the entire surface of a wafer and, thereafter, B.sup.+ or H.sup.+ ions are implanted using a photoresist pattern as a mask. An insulating region 10 having a depth of about 11,000 Angstroms is produced.
As shown in FIG. 3(d)), the second insulating film 9 comprising SiO is etched by RIE using a mixture of C.sub.2 F.sub.6 +CHF.sub.3 +O.sub.2 +He whereby a side wall 11 is produced. When the second insulating film comprises SiN, a mixture of CHF.sub.3 +O.sub.2 is used in the RIE. The etching is conducted under conditions of temperature, gas mixture ratios, and the like so that the first insulating film pattern 7 is not etched.
As shown in FIG. 3(e), a photoresist pattern 12 is deposited and a metal 13, such as AuZn, is vapor deposited on the entire surface. Base electrodes 13a are produced using the photoresist pattern 12 and the first insulating film pattern 7 as a mask, separated from the emitter cap layer by distances corresponding to the thickness of the side wall 11.
As shown in FIG. 3(f), the photoresist pattern 12, the first insulating film pattern 7, and the side wall 11 are removed by etching with hydrofluoric acid. Unnecessary material 13 is also removed. A collector electrode 40 is also present.
As shown in FIG. 3(g), a first or second insulating film 14 is deposited on the entire surface, and a photoresist is deposited thereon to flatten the surface. Thereafter, equal speed etching of the photoresist and the insulating film 14 by RIE exposes the head portion of the emitter cap layer 6, thereby flattening the insulating film 14. An emitter electrode metal 15 comprising an AuGe alloy is deposited on the exposed portion of the emitter cap layer 6.
In the prior art method of producing an HBT, implanted Mg.sup.+ ions connect the base region to the surface and produce a base electrode at the surface of the device. In ion implantation, however, the impurity concentration of the external base region 8 is low, about 5.times.10.sup.18 cm.sup.-3 at the most, and it is impossible to significantly reduce the external base resistance.
When producing an emitter electrode, surface flattening and exposure of the emitter cap layer by equal speed RIE of the photoresist and insulating film exploit a step produced by the emitter cap layer 6. Therefore, the reproducibility of the process and uniformity of the product are poor.
The emitter cap layer 6 is an n.sup.+ -type GaAs layer and is required to have a step of about 2,000 to 3,000 Angstroms in height. Further, this step is produced by wet etching. Therefore, the reproducibility and uniformity of the emitter width are poor due to variations in wet etching and precision patterning of the emitter width is difficult.
When the base electrode parts 13a are spaced from the emitter by distances equal to the thickness of the side wall, the spacing between the base electrode metal 13 and the emitter electrode dummy pattern 7 is difficult to control. This lack of control reduces yield.